Data acquisition systems for generating digital data for the purposes of computation may receive analog input signals from a plurality of sensors, which analog signals must be digitized before they can be used by a computer as a basis for supporting computations. It is desirable to include respective analog-to-digital converters for the analog output signals from the various sensors within the confines of an inexpensive single monolithic integrated circuit, together with some simple initial processing circuitry. Such data acquisition circuitry can be constructed using metal-oxide-semiconductor (MOS) integrated circuit technology and is suited for applications such as power metering.
Since the unit cost of monolithic integrated circuits tends to go up with the complexity of the digital hardware within their confines, analog-to-digital converters, multiplexers, and digital signal processors that are economical of the digital hardware involved were particularly considered by the inventors. Bit-serial multiplexers and processors are particularly economical of digital hardware; and an interconnection for a bit-serial signal requires but two lines, one line for conducting the serial flow of data bits, and the other line for conducting parsing signals. The speed requirements upon a digital signal processor in a data acquisition system are often not so onerous but that bit-serial computations are likely to be found to be fast enough. Oversampling analog-to-digital converters of sigma-delta type, particularly those with first-order sigma-delta modulators, are economical of digital hardware.
Bit-serial multipliers that are amenable to being laid out on a silicon substrate by a computer known as a silicon compiler are described by R. I. Hartley and S. E. Noujaim in their U.S. Pat. No. 4,860,240 issued Aug. 22, 1989 and entitled "LOW-LATENCY TWO'S COMPLEMENT BIT-SERIAL MULTIPLIER". Bit-serial multipliers that are amenable to being laid out on a silicon substrate by a computer known as a silicon compiler are also described by R. I. Hartley and P. F. Corbett in their U.S. Pat. No. 4,910,700 issued Mar. 20, 1990 and entitled "BIT-SLICED DIGIT-SERIAL MULTIPLIER"; and in their U.S. Pat. No. 4,939,687 issued Jul. 3, 1990 and entitled "SERIAL-PARALLEL MULTIPLIERS USING SERIAL AS WELL AS PARALLEL ADDITION OF PARTIAL PRODUCTS". R. I. Hartley and P. F. Corbett describe bit-serial adders that are amenable to being laid out on a silicon substrate by a computer known as a silicon compiler in their allowed U.S. patent application Ser. No. 265,210 filed Oct. 31, 1988 and now entitled "DIGIT-SERIAL LINEAR COMBINING APPARATUS USEFUL IN DIVIDERS". Oversampling analog-to-digital converters using first-order sigma-delta modulators are, by way of example, described by S. L. Garverick in U.S. Pat. No. 4,896,156 issued Jan. 23, 1990 and entitled "SWITCHED-CAPACITANCE COUPLING NETWORKS FOR DIFFERENTIAL-INPUT AMPLIFIERS, NOT REQUIRING BALANCED INPUT SIGNALS". P. L. Jacob and S. L. Garverick describe correcting for systematic errors in oversampling analog-to-digital converters in U.S. Pat. No. 4,951,052 issued Aug. 21, 1990 and entitled "CORRECTION OF SYSTEMATIC ERROR IN AN OVERSAMPLED ANALOG-TO-DIGITAL CONVERTER". Each of the foregoing patents is assigned to General Electric Company and is incorporated herein by reference.
For metering electrical parameters of p-phase power line operation, where p is a positive integer, the data acquisition system uses respective sensors for developing analog signals indicative of the current flow in each phase and of the voltage associated with each phase. Current sensors can be provided by inserting the primary windings of current transformers in each power line phase and connecting their secondary windings in wye or star configuration with appropriate resistive loads to generate analog voltages indicative of the phase currents, which analog voltages can then be digitized--e.g., by using oversampling analog-to-digital converters of sigma-delta type. Voltage sensors can be provided by connecting the primary windings of other transformers in wye or star configuration to sense each phase voltage (or alternatively in delta or mesh configuration to sense phase-to-phase voltages) and connecting their secondary windings in wye or star configuration with appropriate resistive loads to generate analog voltages indicative of the phase voltages, which analog voltages can then be digitized--e.g., by using oversampling analog-to-digital converters of sigma-delta type. The digitized phase currents and phase voltages can then be utilized in calculating the electrical parameters of power line operation in a simple digital computer. These electrical parameters can include: phase voltage, phase current, total real power transmission through the power line, total reactive power transmission through the power line, total apparent power transmission through the power line, power factor and lead/lag phase angle of power transmission through the power line.